Latest VLSI Techniques for 3nm Technology for Building Efficient AI Chips
DOI:
https://doi.org/10.63995/DAIS5138Keywords:
3nm Technology, AI Chips, Energy Efficiency, Low Power Design, VLSI Techniques, Semiconductor TechnologyAbstract
Modern AI chip design has achieved a remarkable milestone, delivering 10X productivity gains through advanced automation and machine learning optimization. Specifically, these improvements allow engineers to create more efficient designs while significantly reducing time-to-market. The integration of artificial intelligence into VLSI chip design has revolutionized how we approach complex semiconductor development. In fact, these technologies now enable the integration of billions of transistors onto a single chip, while optimizing power, performance, and area (PPA) for maximum efficiency. Furthermore, AI-driven predictive modeling helps identify potential issues early in the design phase, ensuring better outcomes before physical implementation. We will explore the latest techniques in 3nm technology, covering everything from process node fundamentals to thermal management systems. Our comprehensive guide examines power management architectures, memory integration methods, and neural processing unit designs that are essential for creating high-performance AI chips in today's competitive landscape.
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Yuan Taur and Tak H Ning. Fundamentals of modern VLSI devices. Cambridge university press, 2021. DOI: https://doi.org/10.1017/9781108847087
M Michael Vai. VLSI design. CRC press, 2017.
Filip Kocina and Jiří Kunovsky`. “Advanced VLSI Circuits Simulation”. In: 2017 International Conference on High Performance Computing & Simulation (HPCS). IEEE. 2017, pp. 526–533. DOI: https://doi.org/10.1109/HPCS.2017.84
Vidisha Khetarpal, Lipika Gupta, Raman Dhand, and Preeti Sharma. “Machine Learning Tech- niques for VLSI Circuit Design: A Review”. In: International Conference on Intelligent Systems Design and Applications. Springer. 2023, pp. 191–199. DOI: https://doi.org/10.1007/978-3-031-64847-2_17
Oliver Ava, Muhammad Oscar, and Tommy George. “The Impact and Prevention of Latch-up in CMOS in VLSI Design”. In: Fusion of Multidisciplinary Research, An International Journal (FMR) 1.1 (2020), pp. 1–13. DOI: https://doi.org/10.63995/VGRD5263
Jeetendra Singh, Balwant Raj, and Monirujjaman Khan. “Role of high-performance VLSI in the advancement of healthcare systems”. In: Advanced Circuits and Systems for Healthcare and Security Applications. CRC Press, 2022, pp. 147–160. DOI: https://doi.org/10.1201/9781003189633-7
Tomasz Wojcicki. VLSI: Circuits for emerging applications. CRC Press, 2017.
Cherry Bhargava and Gaurav Mani Khanal. Advanced VLSI Technology: Technical Questions with Solutions. River Publishers, 2022. DOI: https://doi.org/10.1201/9781003337065
Saptarshi Das, Amritanand Sebastian, Eric Pop, Connor J McClellan, Aaron D Franklin, Tibor Grasser, Theresia Knobloch, Yury Illarionov, Ashish V Penumatcha, Joerg Appenzeller, et al. “Transistors based on two-dimensional materials for future integrated circuits”. In: Nature Electronics 4.11 (2021), pp. 786–799. DOI: https://doi.org/10.1038/s41928-021-00670-1
Nakamura Shuto, Akari Chiyo, Himari Ken, and Sato Tanaka. “Quantum Materials to the Pi- oneering Future of Computing and Communication”. In: Fusion of Multidisciplinary Research, An International Journal (FMR) 1.1 (2020), pp. 50–62. DOI: https://doi.org/10.63995/GFFF3710
Suman Lata Tripathi, Sobhit Saxena, Sanjeet Kumar Sinha, and Govind Singh Patel. Digital VLSI design and simulation with Verilog. Wiley Online Library, 2022.
Sudhakar Alluri, B Balaji, and Ch Cury. “Low power, high speed VLSI circuits in 16nm tech- nology”. In: AIP Conference Proceedings. Vol. 2358. 1. AIP Publishing. 2021. DOI: https://doi.org/10.1063/5.0060101
Takahiro Hanyu, Tetsuo Endoh, Daisuke Suzuki, Hiroki Koike, Yitao Ma, Naoya Onizawa, Masanori Natsui, Shoji Ikeda, and Hideo Ohno. “Standby-power-free integrated circuits using MTJ-based VLSI computing”. In: Proceedings of the IEEE 104.10 (2016), pp. 1844–1863. DOI: https://doi.org/10.1109/JPROC.2016.2574939
Andrew B Kahng, Lutong Wang, and Bangqi Xu. “TritonRoute: An initial detailed router for advanced VLSI technologies”. In: 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD). IEEE. 2018, pp. 1–8. DOI: https://doi.org/10.1145/3240765.3240766
Alexandre Gabriel, Claude Charles, Louis Andre, and Charlotte Antoine. “Navigating the Fu- ture of Wearable Devices with Flexible Electronics”. In: Fusion of Multidisciplinary Research, An International Journal (FMR) 1.2 (2020), pp. 63–72. DOI: https://doi.org/10.63995/JKTG9603
Sergey K Tolpygo, Vladimir Bolkhovsky, Terence J Weir, Alex Wynn, Daniel E Oates, Leonard M Johnson, and Mark A Gouker. “Advanced fabrication processes for superconducting very large-scale integrated circuits”. In: IEEE Transactions on Applied Superconductivity 26.3 (2016), pp. 1–10. DOI: https://doi.org/10.1109/TASC.2016.2519388
Deepthi Amuru, Andleeb Zahra, Harsha V Vudumula, Pavan K Cherupally, Sushanth R Gur- ram, Amir Ahmad, and Zia Abbas. “AI/ML algorithms and applications in VLSI design and technology”. In: Integration 93 (2023), p. 102048. DOI: https://doi.org/10.1016/j.vlsi.2023.06.002
Vamshi Krishna Kambhampati, UP Shikohabad, Shaik Saidulu, and PA Saleem. “Evolution of low power digital VLSI system design using cmos circuit”. In: GIS science journal 8.5 (2021), pp. 1638–1650.
Ayush Tiwari and Mrs Rajani Bisht. “Leakage Power Reduction in CMOS VLSI Circuits using Advance Leakage Reduction Method”. In: International Journal for Research in Applied Science and Engineering Technology 9 (2021), pp. 962–966. DOI: https://doi.org/10.22214/ijraset.2021.35065
Adrichem De Jong, Mark Jansen, Jeffrey Van Dijk, and Johannes Meyer. “Analysis of Inno- vative Practices in Advanced Materials and Structural Engineering”. In: Fusion of Multidisci- plinary Research, An International Journal (FMR) 2.1 (2021), pp. 178–188. DOI: https://doi.org/10.63995/JWFN9981
Pietro Nannipieri, Stefano Di Matteo, Luca Baldanzi, Luca Crocetti, Luca Zulberti, Sergio Saponara, and Luca Fanucci. “VLSI design of Advanced-Features AES CryptoProcessor in the framework of the European Processor Initiative”. In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems 30.2 (2021), pp. 177–186. DOI: https://doi.org/10.1109/TVLSI.2021.3129107
Jody Maick Matos, Jordi Carrabina, and Andre Reis. “Efficiently mapping VLSI circuits with simple cells”. In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 38.4 (2018), pp. 692–704. DOI: https://doi.org/10.1109/TCAD.2018.2818709
BT Geetha, B Padmavathi, and V Perumal. “Design methodologies and circuit optimization techniques for low power CMOS VLSI design”. In: 2017 IEEE International Conference on Power, Control, Signals and Instrumentation Engineering (ICPCSI). IEEE. 2017, pp. 1759–1763. DOI: https://doi.org/10.1109/ICPCSI.2017.8392016
Theodore Elijah, James Clarence, Benjamin Anthony, and Christopher William. “The Journey and Potential of Organ-on-a-Chip Technology”. In: Fusion of Multidisciplinary Research, An International Journal (FMR) 2.2 (2021), pp. 211–223. DOI: https://doi.org/10.63995/SRZT8056
Anirban Sengupta, Vipul Kumar Mishra, David Pan, Yier Jin, Theocharis Theocharides, Prasun Ghosal, Mayukh Sarkar, Amlan Ganguly, Naseef Mansoor, Md Shahriar Shamim, et al. VLSI Circuits and Systems Letter. 2019.
Chuan Zhang, Yuan-Hao Huang, Farhana Sheikh, and Zhongfeng Wang. “Advanced baseband processing algorithms, circuits, and implementations for 5G communication”. In: IEEE Journal on Emerging and Selected Topics in Circuits and Systems 7.4 (2017), pp. 477–490. DOI: https://doi.org/10.1109/JETCAS.2017.2743107
Yihang Qiu, Yan Xing, Xin Zheng, Peng Gao, Shuting Cai, and Xiaoming Xiong. “Progress of placement optimization for accelerating VLSI physical design”. In: Electronics 12.2 (2023), p. 337. DOI: https://doi.org/10.3390/electronics12020337
P Sasipriya and VS Kanchana Bhaaskaran. “Design of low power VLSI circuits using two phase adiabatic dynamic logic (2PADL)”. In: Journal of Circuits, Systems and Computers 27.04 (2018), p. 1850052. DOI: https://doi.org/10.1142/S0218126618500524
Valdemar Johansen, Malthe Rasmussen, and Arne Knudsen. “Dielectric Constants and Their Role in Plasma Simulation”. In: Fusion of Multidisciplinary Research, An International Journal (FMR) 3.1 (2022), pp. 248–260. DOI: https://doi.org/10.63995/IYWJ6936
Sanjay Vidhyadharan, Ramakant Yadav, Simhadri Hariprasad, and Surya Shankar Dan. “An advanced adiabatic logic using Gate Overlap Tunnel FET (GOTFET) devices for ultra-low power VLSI sensor applications”. In: Analog Integrated Circuits and Signal Processing 102.1 (2020), pp. 111–123. DOI: https://doi.org/10.1007/s10470-019-01561-4
Suryakanta Nayak and Mrutyunjaya Panda. “Realization of VLSI circuit partitioning using advanced genetic algorithm”. In: Solid State Technology 63.5 (2020), pp. 9129–9145.
Fernanda Hernández, Leonardo Sánchez, Gabriela González, and Andrés Ramírez. “Revolu- tionizing CMOS VLSI with Innovative Memory Design Techniques”. In: Fusion of Multidisci- plinary Research, An International Journal (FMR) 3.2 (2022), pp. 366–379. DOI: https://doi.org/10.63995/BDUH3010
Rassul Bairamkulov and Eby Friedman. “Graphs in vlsi circuits and systems”. In: Graphs in VLSI. Springer, 2022, pp. 59–100. DOI: https://doi.org/10.1007/978-3-031-11047-4_3
Peng Zou, Xiqiong Bai, Yingjie Wu, Lifeng Wu, and Jianli Chen. “An effective detailed routing algorithm considering advanced VLSI technologies”. In: 2019 IEEE 13th International Confer- ence on ASIC (ASICON). IEEE. 2019, pp. 1–4. DOI: https://doi.org/10.1109/ASICON47005.2019.8983638
Shira Rubin, Daniel Mizrachi, Noam Friedman, Hila Edri, and Tamar Golan. “The World of Advanced Thin Films: Design, Fabrication, and Applications”. In: Fusion of Multidisciplinary Research, An International Journal (FMR) 4.1 (2023), pp. 393–406. DOI: https://doi.org/10.63995/SIKH4721
Kuruva Lakshmanna, Fahimuddin Shaik, Vinit Kumar Gunjan, Ninni Singh, Gautam Kumar, and R Mahammad Shafi. “Perimeter degree technique for the reduction of routing congestion during placement in physical design of VLSI circuits”. In: Complexity 2022.1 (2022), p. 8658770. DOI: https://doi.org/10.1155/2022/8658770
Samar K Saha. FinFET devices for VLSI circuits and systems. CRC Press, 2020. DOI: https://doi.org/10.1201/9780429504839
T Suguna and M Janaki Rani. “Survey on power optimization techniques for low power VLSI circuit in deep submicron technology”. In: International Journal of VLSI design and Communication Systems 9.1 (2018), pp. 1–15. DOI: https://doi.org/10.5121/vlsic.2018.9101
Elliot Greenwald, Matthew R Masters, and Nitish V Thakor. “Implantable neurotechnologies: bidirectional neural interfaces—applications and VLSI circuit implementations”. In: Medical & biological engineering & computing 54 (2016), pp. 1–17. DOI: https://doi.org/10.1007/s11517-015-1429-x
Ibrahim M Elfadel, Duane S Boning, and Xin Li. Machine learning in VLSI computer-aided design. Springer, 2019. DOI: https://doi.org/10.1007/978-3-030-04666-8
Jitesh R Shinde, Suresh S Salankar, and Shilpa J Shinde. “Multi-objective optimization domino techniques for VLSI circuit”. In: 2016 International Conference on Advances in Computing, Communications and Informatics (ICACCI). IEEE. 2016, pp. 2126–2130. DOI: https://doi.org/10.1109/ICACCI.2016.7732366
Bernhard Sell, S An, J Armstrong, D Bahr, B Bains, R Bambery, K Bang, D Basu, S Bendapudi, D Bergstrom, et al. “Intel 4 CMOS technology featuring advanced FinFET transistors opti- mized for high density and high-performance computing”. In: 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits). IEEE. 2022, pp. 282–283.
Anastasia Klymenko, Snizhana Shevchenko, Rostislav Marchenko, and Dmitriy Tkachenko. “Electrode Batteries: Organic Material’s influence on Lithium-Ion Battery Performance”. In: Fusion of Multidisciplinary Research, An International Journal (FMR) 4.2 (2023), pp. 458–470. DOI: https://doi.org/10.63995/SGCF3012
Brajesh Kumar Kaushik. Nanoelectronics: Devices, Circuits and Systems. Elsevier, 2018.
Rassul Bairamkulov and Eby G Friedman. Graphs in VLSI. Springer, 2023. DOI: https://doi.org/10.1007/978-3-031-11047-4
Angsuman Sarkar, Swapnadip De, Manash Chanda, and Chandan Kumar Sarkar. Low power VLSI design: fundamentals. Walter de Gruyter GmbH & Co KG, 2016. DOI: https://doi.org/10.1515/9783110455298
Ankur Kumar, Sajal Agarwal, Vikrant Varshnay, Varun Mishra, Yogesh Kumar Verma, and Suman Lata Tripathi. Opto-VLSI Devices and Circuits for Biomedical and Healthcare Applications. CRC Press, 2023. DOI: https://doi.org/10.1201/9781003431138
Gage Hills, Marie Garcia Bardon, Gerben Doornbos, Dmitry Yakimets, Pieter Schuddinck, Ro- gier Baert, Doyoung Jang, Luca Mattii, Syed Muhammed Yasser Sherazi, Dimitrios Rodopou- los, et al. “Understanding energy efficiency benefits of carbon nanotube field-effect transistors for digital VLSI”. In: IEEE Transactions on Nanotechnology 17.6 (2018), pp. 1259–1269. DOI: https://doi.org/10.1109/TNANO.2018.2871841
